Designing a Better Chip
NYUAD Assistant Professor of Engineering Ozgur Sinanoglu and team in the Design-for-Excellence lab at NYUAD have received recognition, and a US National Science Foundation grant for their work on developing and advancing techniques to build protections directly into the chip-design process.

NYUAD Professor Wins Research Grant from ATIC

NYUAD Assistant Professor of Computer Engineering Ozgur Sinanoglu has been awarded a USD 200,000 grant by the Advanced Technology Investment Company (ATIC) to conduct a two-year research project in electronic chip testing in Abu Dhabi. The grant is supported by the Semiconductor Research Corporation (SRC), an international technology research consortium that provided technical support and expertise in the grant selection process.

NYUAD’s Design for Excellence Lab, headed by Sinanoglu, focuses on the area of electronic chip reliability and security. Testing of chips is an important research area for improving the efficiency of semiconductor fabrication, as the process of screening for defects is estimated to account for roughly 30 percent of production costs.

With the ATIC grant, Sinanoglu — supported by NYUAD Global Academic Fellow and NYU New York PhD student Chandrakumar Holenarasipursuresh — will investigate the area of adaptive testing, which, unlike the conventional approach of using a uniform test for a given batch of chips, takes into account the slight variations that can arise in the manufacturing process. By classifying the possible types of variations that can occur and customizing the testing process for each of these groups, the semiconductor industry could improve the quality of testing through improved defect detection.

In the second phase of the project, they will delve more specifically into the area of dynamic voltage scaling in computing. These chips are designed to adapt their power intake depending on the performance requirements of a given application, a technology that has great potential to improve the overall power efficiency of electronic devices.

“This is something that is quite new, and going forward we expect this technique to be employed a lot, especially in chips that are power critical,” Sinanoglu explained. “This would be particularly impactful in battery-operated devices, like cell phones and laptops.”

Adaptive testing technology for these kinds of chips is especially useful in computing the correlations between voltage level requirements at various speeds of operation. Computing this information is generally a costly process, however, adaptive testing procedures may make it easier and more efficient to compute this information accurately.

“As chips vary, the table that you compute for one chip is not the same as for another. You need to be able to do this adaptively, quickly, and accurately, to make sure each chip is working properly,” Sinanoglu said.

In addition to receiving funding for this research, Sinanoglu said that having the opportunity to discuss findings and receive feedback from industry leaders that are member organizations of SRC — such as GlobalFoundries, IBM, and Intel — during annual research meetings will be a particularly beneficial aspect of the grant.

In its efforts to stimulate research innovation in semiconductor technology, ATIC provides USD 1 million in grants to UAE-based higher education institutions annually. Intellectual property and findings from these projects are accessible to SRC members, supporting the implementation of new technologies in the industry.