Design-for-Excellence Lab

directed by Prof. Ozgur Sinanoglu

 
 

We are looking for PhD candidates to join us.

Click to learn how to initiate

Click to learn more about scholarship opportunities.

20/06/2015 - US Army Research Office (Department of Defense) provides $400K funding for our research on IC camouflaging. Read More.

 

16/06/2015 - US National Science Foundation provides $500K funding for our research on secure high-level synthesis. Read More.

 

07/06/2015 - TwinLab on Hardware Security and Trust has been launched with the support of GLOBALFOUNDRIES on a $2.6M budget. The goal is to fabricate the first truly trustworthy microprocessor chip. Read More.

 

13/11/2014 - SRC/Mubadala Tech provides $463K funding for our research on NEMS test and security. Read More.

 

23/10/2014 - Samah Saeed won the “TTTC McCluskey Best Doctoral Thesis Award” in the VLSI Test Community. Read More.

 

19/01/2014 - Our research is featured in an article in The National. Read More.

 

8/11/2013 - Our paper titled “Security Analysis of Integrated Circuit Camouflaging”, received the Best Student Paper Award at ACM Conference on Computer and Communications Security 2013. Read More.

 

21/8/2013 - US National Science Foundation provides $500K funding for our research on hardware security. Read More.

 

28/7/2013 - SRC/ATIC provides $180K funding (NYUAD will match 1:1) for our research on hardware security. Read More.

 

30/4/2013 - Samah Saeed received the “Pearl Brownstein Doctoral Research Award” from the CSE Department of NYU-Poly. Read More.

 

7/6/2012 - SRC/ATIC provides $200K funding for our research on adaptive testing of chips. Read More.

 

16/2/2012 - Sachhidh Kannan received the prestigious Great Minds Internship Award at the IBM Zurich Research Center. Read More.

 

10/1/2012 - VLSI Test Symposium 2011 Best Paper Award received by Samah Saeed and Ozgur Sinanoglu. Read More

 

Welcome to the DfX Lab!

We are a research team in NYU Abu Dhabi, whose main focus is the reliability and security of electronic chips. With the increasing complexity of designs, enhanced capabilities of engraving smaller transistors on silicon, and low-power, high-performance operation requirements, integrated circuits are becoming more and more vulnerable to reliability and security threats. Electronic chips manufactured today exhibit a higher defect rate, fail more often during their mission-mode operation, die quicker in the field, and thanks to globalization and outsourcing, are more prone to security threats such as counterfeiting, IP piracy and hardware trojans.

Our mission is to design these electronic chips with built-in defense mechanisms, in order to expose defective chips more easily and cost-effectively, make them resilient to errors during mission mode, expose any intentional malicious alteration of the chips and protect design IP from reverse engineering. We develop Design-for-Excellence techniques  comprising of hardware design blocks and accompanying software CAD tools. Currently, 4 graduate students are working under the supervision of Prof. Ozgur Sinanoglu.

 

 

 

What’s new?

21/8/2013 - US National Science Foundation provides $500K funding for our research on hardware security. Read More.

 

 

28/7/2013 - SRC/ATIC provides $180K funding (NYUAD will match 1:1) for our research on hardware security. Read More.


30/4/2013 - Samah Saeed received the “Pearl Brownstein Doctoral Research Award” from the CSE Department of NYU-Poly. Read More.


7/6/2012 - SRC/ATIC provides $200K funding for our research on Adaptive Testing of Electronic Chips. Read More.


16/2/2012 - Sachhidh Kannan received the prestigious Great Minds Internship Award at the IBM Zurich Research Center. Read More.


10/1/2012 - VLSI Test Symposium 2011 Best Paper Award received by Samah Saeed and Ozgur Sinanoglu. Read More.

The director of the DfX Lab is Prof. Ozgur Sinanoglu, who is an Associate Prof of ECE at New York University in Abu Dhabi. Prof. Ozgur Sinanoglu obtained his Ph.D. in Computer Science and Engineering from University of California, San Diego, in 2004. During his PhD, he was given the IBM PhD Fellowship Award in two consecutive years in 2001 and 2002, and his PhD thesis won the CSE PhD Dissertation Award in UCSD in 2005. He worked for two years at Qualcomm in San Diego as a senior Design-for-Testability engineer, primarily responsible for developing cost-effective test solutions for low-power SOCs. After a 4-year academic experience at Kuwait University, where he was given two research awards, he has joined in Fall 2010 New York University in Abu Dhabi. Upon spending his integration year as a visiting Faculty in New York at the ECE Department of NYU Poly, he joined the Faculty in AbuDhabi in Fall 2011. His primary field of research is the reliability and security of integrated circuits, mostly focusing on CAD tool development. He has more than 130 conference and journal papers in addition to around 15 issued and pending patents. His research has been funded by US National Science Foundation, US Army Research Office (Department of Defense), Semiconductor Research Corporation and Advanced Technology Investment Company.

He is currently serving as:

  1. Technical Program Committee Member for ITC, DAC, DATE, VTS, ETS (track chair), ICCD (track co-chair), VLSI-SOC (track co-chair), ACNS, DFTS, LATS, DTIS
  2. Journal editorial board member for IEEE TIFS, JETTA, Elsevier MEJ, IET CDT

    Guest Editor for IEEE TCAD (Special Issue on Hardware Security), ACM JETC (Special Issue on Hardware Security)